1. Field of the Invention
The present invention relates to a semiconductor device suitable for a DRAM (dynamic random access memory) having a capacitor (capacitive element): employing a high dielectric film or an SRAM (static random access memory) having a capacitor employing a ferroelectric film and a method of manufacturing the same.
2. Description of the Background Art
First, a term employed in this specification is described. Throughout the specification, the term xe2x80x9cnoble metalxe2x80x9d stands for a metal belonging to a group consisting of gold, silver and the platinum metals (Ru, Rh, Pd, Os, Ir and Pt).
A DRAM is generally known as a semiconductor memory device capable of inputting/outputting stored information at random. In general, such a DRAM has a memory cell array serving as a storage area storing numerous information and a peripheral circuit necessary for inputting/outputting the information from/to an external device. A group of memory cells is arranged on the memory cell array, occupying a large area in a semiconductor chip, in the form of a matrix.
A known memory cell for storing unitary memory information has a single MOS (metal oxide semiconductor) transistor and a single capacitor connected thereto. Such a memory cell is referred to as a one-transistor one-capacitor memory cell. This type of memory cell having a simple structure can readily improve the degree of integration of the memory cell array, and is hence widely employed in a DRAM having a large capacity.
Memory cells of the DRAM are classified into some types depending on capacitor structures. A known capacitor is referred to as a stacked capacitor. A principal part of the stacked capacitor is extended onto a gate electrode or a field oxide film, thereby ensuring a large facing area between electrodes.
Due to the aforementioned characteristic, the stacked capacitor can ensure a high capacitance also when elements are refined following integration of the semiconductor memory device. Therefore, the stacked capacitor is increasingly employed following integration of the semiconductor memory device.
However, the stacked capacitor must be more highly formed over a semiconductor substrate in response to refinement of the elements. Following the recent progress of refinement of the elements, it is now becoming difficult to ensure the capacitance required to the capacitor by this method. This also applies to a trench capacitor or a cylindrical capacitor, which is another representative three-dimensional capacitor structure.
Therefore, an attempt of employing a dielectric film consisting of a high dielectric constant material such as BST (barium strontium titanate) as a capacitor dielectric film is made in order to increase the capacitance of the capacitor. FIG. 28 is a sectional view partially showing a memory cell of a DRAM 150 employing a high dielectric constant material such as BST as a capacitor dielectric film. This semiconductor device 150 comprises a semiconductor substrate 1, a lower insulating layer 2, a conductor plug 3, a barrier metal layer 5, a lower electrode film 6, side walls 7, a dielectric film 8, an upper electrode film 9, an upper insulating layer 11, a,barrier metal layer 60 and a wire 20. Platinum is employed as the material for the lower electrode film 6 and the upper electrode film 9, and titanium nitride is employed as the material for the barrier metal layers 5 and 60. The dielectric film 8 is formed as a BST dielectric film, and the wire 20 is an aluminum wire. The lower insulating layer 2 and the upper insulating layer 11 are formed as interlayer isolation films.
The semiconductor device 150 is characteristically different from any preceding DRAM in that not polycrystalline silicon but a noble metal such as platinum is employed as the material for a capacitor electrode film of a memory cell. In the DRAM preceding the semiconductor device 150, a silicon oxide film obtained by thermally oxidizing silicon or a silicon nitride film formed by CVD (chemical vapor deposition) is employed as the capacitor dielectric film. Both of silicon oxide and silicon nitride are compounds of silicon, and hence the capacitor dielectric film can be readily formed on a lower electrode film prepared from polycrystalline silicon.
When a dielectric film consisting of a high dielectric constant material such as BST (barium strontium titanate) is formed on a polycrystalline silicon film, however, the electrochemically base polycrystalline silicon film is so readily oxidized that a silicon oxide film is formed on the interface between the dielectric film of BST and the lower electrode film of polycrystalline silicon. This silicon oxide film remarkably reduces electrostatic capacitance of the capacitor due to its low dielectric constant.
In order to prevent this, a noble metal such as electrochemically noble platinum having high oxidation resistance is employed for the upper electrode film 6 and the lower electrode film 9 in the semiconductor device 150. Further, the conductive barrier metal layers (anti-diffusion films) 5 and 60 are interposed on the interfaces between the upper and lower electrode films 6 and 9 and the conductive materials mainly composed of silicon and aluminum, which are electrically connected with the electrode films 6 and 9, for preventing mutual diffusion between silicon and platinum and between aluminum and platinum.
In a process of manufacturing the semiconductor device 150, the upper insulating layer 11 covering the upper electrode film 9 consisting of a noble metal such as platinum must be etched for forming a contact hole 61 and electrically connecting the upper electrode film 9 and the wire 20 with each other through this contact hole 61. In this etching step, however, it is disadvantageously difficult to precisely control etching conditions so that the etching is stopped when the upper surface of the thinly formed upper electrode film 9 is exposed not to cause over-etching. Further, a re-deposition film 12 consisting of a component of a resist film and platinum is disadvantageously formed around the bottom portion of the contact hole 61. The re-deposition film 12 consisting of the component of the resist film and platinum, which is chemically stable and adheres to a portion of the inner wall surface of the contact hole 61 around the bottom portion, is hard to remove. The re-deposition film 12 increases contact resistance.
In order to solve the aforementioned problems, it is possible to assume a capacitor structure obtained by forming an etching stopper layer (not shown) on the upper surface of the upper electrode film 9. When the etching stopper layer is thickly set to a necessary degree in this structure, however, the effective capacitor height is increased. Consequently, an absolute step is disadvantageously increased between a memory cell array having the capacitor and a peripheral circuit having no capacitor. When the material for the upper electrode film 9 is patterned for forming the upper electrode film 9, further, a composite film of a three-layer structure including the etching stopper layer and the dielectric film 8 must be etched. Consequently, the upper electrode film 9 cannot be readily finely worked.
Thus, an object of the present invention is to provide a semiconductor device capable of preventing over-etching in formation of a contact hole and preventing formation of a re-deposition film without providing an etching stopper layer and a method of manufacturing the same.
A semiconductor device according to a first aspect of the present invention comprises a semiconductor substrate having a main surface, an insulating layer formed on the main surface of the semiconductor substrate, a lower electrode film embedded in the insulating layer, a dielectric film embedded in the insulating layer and covering the lower electrode film, an upper electrode film embedded in the insulating layer and opposed to the lower electrode film through the dielectric film, a conductor plug electrically connecting the lower electrode film and the semiconductor substrate with each other through a lower contact hole selectively formed in the insulating layer, a conductor layer embedded in the insulating layer and electrically connected to the upper electrode film on a first portion defining a part of its upper surface and a wire arranged on the insulating layer and connected to a second portion defining another part, different from the first portion, of the upper surface of the conductor layer through an upper contact hole selectively formed in the insulating layer.
In the semiconductor device according to the first aspect, electrical connection between the upper electrode film and the wire is implemented by electrically connecting the upper electrode film to the first portion of the upper surface of the conductor layer and connecting the wire to the second portion through the upper contact hole.
Dissimilarly to the prior art forming the upper contact hole on the upper electrode film, therefore, allowance for over-etching is improved in formation of the upper contact hole. In other words, manufacturing errors in the semiconductor device can readily be suppressed.
According to a second aspect of the present invention, the conductor plug includes another conductor layer, and the another conductor layer and the conductor layer are identical in height to each other with reference to the main surface of the semiconductor substrate, identical in thickness to each other, and made of the same material.
In the semiconductor device according to the second aspect, the conductor plug includes another conductor layer, which can serve as a barrier layer preventing mutual diffusion between elements forming the lower electrode film and the semiconductor substrate. Further, the conductor layer and the other conductor layer, which are the same in height with each other with reference to the main surface of the semiconductor substrate, identical in thickness to each other and made of the same material, can be simultaneously formed through a single manufacturing step.
According to a third aspect of the present invention, the lower electrode film and the conductor layer are identical in height to each other with reference to the main surface of the semiconductor substrate, identical in thickness to each other, and made of the same material.
In the semiconductor device according to the third aspect, the lower electrode film and the conductor layer, which are the same in height with each other with reference to the main surface of the semiconductor substrate, identical in thickness to each other and made of the same material, can be simultaneously formed through a single manufacturing step.
According to a fourth aspect of the present invention, the semiconductor device further comprises a conductive side wall formed on a side wall surface of the upper electrode film and the dielectric film, and the side wall is connected to the first portion of the conductor layer.
In the semiconductor device according to the fourth aspect, the side wall electrically connects the upper electrode film and the conductor layer with each other, whereby neither mask pattern nor a transfer step therefor is required for electrically connecting the upper electrode film and the conductor layer with each other. In other words, the upper electrode film and the conductor layer can be electrically connected with each other through a simple step.
According to a fifth aspect of the present invention, the dielectric film covers the first potion of the conductor layer and is chemically converted to a conductor in a portion covering the first portion, and the first portion of the conductor layer is electrically connected to the upper electrode film through the portion of the dielectric film converted to a conductor.
In the semiconductor device according to the fifth aspect, the upper electrode film and the conductor layer are electrically connected with each other through the portion of the dielectric film converted to a conductor, whereby neither a mask pattern nor a transfer step therefor is required for electrically connecting the upper electrode film and the conductor layer with each other. In other words, the upper electrode film and the conductor layer can be electrically connected with each other through a simple step.
According to a sixth aspect of the present invention, material of the lower electrode film and the upper electrode film includes a noble metal.
In the semiconductor device according to the sixth aspect, the material for the electrode films includes a noble metal, whereby a high dielectric film can suitably be used for the dielectric film. The upper electrode film is electrically connected to the wire through the conductor layer, whereby no adhesion film results from the noble metal with no etching stopper but connection resistance can be suppressed.
The present invention is also directed to a method of manufacturing a semiconductor device. A method of manufacturing a semiconductor device according to a seventh aspect of the present invention comprises steps of (a) preparing a semiconductor substrate having a main surface, (b) forming, on the semiconductor substrate, a lower insulating layer selectively formed with a lower contact hole passing through upper and lower surfaces thereof and an opening defined at least in the upper surface so that a conductor plug is embedded in the lower contact hole and a conductor layer is embedded in the opening, (c) forming a first conductor material film on the lower insulating layer, (d) patterning the first conductor material film thereby forming a lower electrode film to be electrically connected to the conductor plug, (e) forming a dielectric film covering the lower electrode film and an upper electrode film covering the dielectric film while electrically connecting the upper electrode film to a first portion defining a part of an upper surface of the conductor layer, (f) forming an upper insulating layer covering the upper electrode film, the conductor layer and the lower insulating layer, (g) selectively forming an upper contact hole passing through upper and lower surfaces in the upper insulating layer by etching to open in a second portion, different from the first portion, of the upper surface of the conductor layer, and (h) forming a wire embedded in the upper contact hole and arranged on the upper insulating layer.
In the manufacturing method according to the seventh aspect, electrical connection between the upper electrode film and the wire is implemented by electrically connecting the upper electrode film to the first portion of the upper surface of the conductor layer and connecting the wire to the second portion through the upper contact hole. Dissimilarly to the prior art forming the upper contact hole on the upper electrode film, therefore, allowance for over-etching is improved in formation of the upper contact hole. In other words, manufacturing errors in the semiconductor device can readily be suppressed.
A method of manufacturing a semiconductor device according to an eighth aspect of the present invention comprises steps of (a) preparing a semiconductor substrate having a main surface, (b) forming, on the semiconductor substrate, a lower insulating layer selectively formed with a lower contact hole passing through upper and lower surfaces thereof so that a conductor plug is embedded in the lower contact hole, (c) forming a first conductor material film on the conductor plug and on the lower insulating layer, (d) patterning the first conductor material film thereby forming a lower electrode film electrically connected to the conductor plug while simultaneously forming a conductor layer separated from the lower electrode film on the lower insulating layer, (e) forming a dielectric film covering the lower electrode film and an upper electrode film covering the dielectric film while electrically connecting the upper electrode film to a first portion defining a part of an upper surface of the conductor layer, (f) forming an upper insulating layer covering the upper electrode film, the conductor layer and the lower insulating layer, (g) selectively forming an upper contact hole passing through upper and lower surfaces in the upper insulating layer to open in a second portion, different from the first portion, of the upper surface of the conductor layer, and (h) forming a wire embedded in the upper contact hole and arranged on the upper insulating layer.
In the manufacturing method according to the eighth aspect, electrical connection between the upper electrode film and the wire is implemented by electrically connecting the upper electrode film to the first portion of the upper surface of the conductor layer and connecting the wire to the second portion through the upper contact hole. Dissimilarly to the prior art forming the upper contact hole on the upper electrode film, therefore, allowance for over-etching is improved in formation of the upper contact hole. In other words, manufacturing errors in the semiconductor device can readily be suppressed. Further, the lower electrode film and the conductor layer are simultaneously formed through a single manufacturing step, whereby the manufacturing. steps are simplified.
According to a ninth aspect of the present invention, the step (b) comprises steps of (b-1) forming an insulator material layer serving as the material for the lower insulating layer on the semiconductor substrate, (b-2) etching the insulator material layer thereby selectively forming the lower contact hole and the opening to pass through upper and lower surfaces together, (b-3) forming a first conductor material layer to fill up the lower contact hole and the opening, (b-4) etching the first conductor material layer thereby retracting its upper surface into the inner parts of the contact hole and the opening, (b-5) forming a second conductor material layer to fill up the lower contact hole and the opening and cover the insulator material layer after the step (b-4), and (b-6) retracting an upper surface of the second conductor material layer to be flush with the upper surface of the insulator material layer.
In the manufacturing method according to the ninth aspect, the conductor plug is formed by the first and second conductor material layers, whereby the second conductor material layer can serve as a barrier layer preventing mutual diffusion between elements forming the lower electrode film and the semiconductor substrate. Further, the lower contact hole and the opening are simultaneously formed through a single manufacturing step while the conductor layer and the second conductor material layer are also simultaneously formed through a single manufacturing step, whereby the manufacturing steps are simplified.
According to a tenth aspect of the present invention, the step (b) comprises steps of (b-1) forming a first insulator material layer on the semiconductor substrate, (b-2) etching the first insulator material layer thereby selectively forming a first lower contact hole defining a part of the lower contact hole to pass through upper and lower surfaces of the first insulator material layer, (b-3) forming a first conductor material layer to fill up the first lower contact hole and cover the first insulator material layer, (b-4) retracting an upper surface of the first conductor material layer to be flush with the upper surface of the first insulator material layer, (b-5) forming a second insulator material layer to cover the upper surfaces of the first conductor material layer and the first insulator material layer after the step (b-4), (b-6) etching the second insulator material layer thereby selectively forming a second lower contact hole communicating with the first lower contact hole and defining another part of the lower contact hole and the opening to pass through upper and lower surfaces of the second insulator material layer together, (b-7) forming a second conductor material layer to fill up the second lower contact hole and the opening and cover the second insulator material layer, and (b-8) retracting an upper surface of the second conductor material layer to be flush with the upper surface of the second insulator material layer.
In the manufacturing method according to the tenth aspect, the conductor plug is formed by the first and second conductor material layers, whereby the second conductor material layer can serve as a barrier layer preventing mutual diffusion between elements forming the lower electrode film and the semiconductor substrate. Further, the conductor layer and the second conductor material layer are simultaneously formed through a single manufacturing step, whereby the manufacturing steps are simplified.
According to an eleventh aspect of the present invention, the step (e) comprises steps of (e-1) forming a dielectric material film to cover the upper surface of the lower insulating layer, the lower electrode film and the conductor layer, (e-2) forming a second conductor material film on the dielectric material film, (e-3) patterning the dielectric material film and the second conductor material film thereby forming the dielectric film covering the lower electrode film and the upper electrode film covering the dielectric film so that side wall surface thereof is adjacent to the first portion of the conductor layer, (e-4) forming a third conductor material film covering the upper electrode film, the conductor layer and the lower insulating layer, and (e-5) etching the third conductor material film thereby removing the third conductor material film while leaving a side wall covering the first portion of the conductor layer as well as the side wall surfaces of the upper electrode film and the dielectric film adjacent to the first portion.
In the manufacturing method according to the eleventh aspect, the upper electrode film and the conductor layer are electrically connected with each other by forming the side wall with no requirement for a mask pattern and a transfer step therefor.
In other words, the upper electrode film and the conductor layer can be electrically connected with each other through a simple step.
According to a twelfth aspect of the present invention, the step (e) comprises steps of (e-1) forming a dielectric material film to cover the upper surface of the lower insulating layer, the lower electrode film and the conductor layer, (e-2) forming a second conductor material film on the dielectric material film, (e-3) patterning the dielectric material film and the second conductor material film thereby forming the dielectric film covering the lower electrode film and the upper electrode film covering the dielectric film to also cover the first portion of the conductor layer, and (e-4) performing heating in any of the steps (e-1) to (e-3) or after the step (e-3), while the material for the conductor layer and the material for the dielectric material film are so selected that a portion of the dielectric material film covering the conductor layer is converted to a conductor due to reductive action of the conductor layer, and a portion of the dielectric material film or the dielectric film covering the conductor layer is converted to a conductor through the step (e-4).
In the manufacturing method according to the twelfth aspect, the upper electrode film and the conductor layer are electrically connected with each other by partially converting the dielectric film to a conductor with no requirement for a mask pattern and a transfer step therefor. In other words, the upper electrode film and the conductor layer can be electrically connected with each other through a simple step.
According to a thirteenth aspect of the present invention, a material including a noble metal is employed for the lower electrode film and the upper electrode film.
In the manufacturing method according to the thirteenth aspect, the material including a noble metal is employed for the electrode films, whereby a high dielectric film can suitably be used for the dielectric film. The upper electrode film is electrically connected to the wire through the conductor layer, whereby no adhesion film results from the noble metal with no etching stopper but connection resistance can be suppressed.
Thus, an object of the present invention is to provide a semiconductor device capable of preventing over-etching in formation of a contact hole and preventing formation of a re-deposition film without providing an etching stopper layer and a method of manufacturing the same.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.